2008/06/11-
FPGAの概要 XC3S50AN System Gates 50K Logic Cells 1,584 Maximum Distributed RAM Bits 11 K Total Block RAM Bits 54 K Maximum user I/O pins(Device) 108 Maximum user I/O pins(Board) 56 Multipliers 3 DCMs 2
XILINXシリーズTOPへ